Skip to main content

Comprehensive Memory Quiz

Comprehensive Memory Quiz​

Section 1 – Memory Layout​

  1. Name the four main segments in a typical process’s virtual address space.

    • Text segment – compiled code (read-only, executable).
    • Data segment – global/static vars with initial values.
    • BSS segment – global/static vars without initial values (zero-init).
    • Stack – local vars, return addresses, grows downward.

  2. Which segment grows downward in memory? Which grows upward?

    • Heap grows upward (higher VAs)
    • Stack grows downward (lower VAs)
      • guard pages below catch overflow

  3. What is stored on the stack?

    • Call Stack (so then also):
      • function params
      • return addresses
      • fixed size vars within scope

  4. What is stored on the heap? Heap is for flexible size or flexible lifetime (or both), eveyrthing else cheaper to place on stack

    • dynamically sized vars (including tree like structures that may nest/grow)
    • lifetime controlled explicitly (no GC involved)

Everything else, by default, is cheaper and faster to put on the stack.

  1. Which segment stores global and static variables?

    • data segment / BSS segment

  2. Where does compiled code (instructions) reside?

    • text segment

  3. How is the size of the stack typically limited?

    • ulimit -s / RLIMIT_STACK hit the limit -> SIGSEGV, no new page added

  4. What happens if the stack grows beyond its allocated limit?

    • Stack overflow (SIGSEGV) when you hit the guard page

  5. Which segment is most commonly involved when using malloc()?

    • heap

  6. Which segment is most commonly involved when defining a local variable in a function?

    • stack

Section 2 – Virtual Memory and Translation​

  1. What does VA stand for? How is it different from PA?

    • Virtual Address / Physical Address

  2. What are the main benefits of virtual memory? (Name at least three)

    • Security (Isolation, cant purposely overflow into target region)
    • Convenience (looks like one big block starting at 0000000)
    • Efficiency - Can reuse PA between processes

  3. In the translation process, what two parts is a virtual address split into?

    • Page number, page offset

  4. What is the TLB and why is it important?

    • Translation Lookaside Buffer - Cache of PTEs in cpu (no need to go to page table in RAM)

  5. On a TLB miss, what happens before data can be accessed? walk page table in RAM

  6. What is a PTE and what information does it store? Page Table Entry - lookup VA/PA and metadata (r/w permissions, VMA group it belongs to, etc.)

  7. What is a VMA and how is it different from a PTE? Virtual Memory Area -- Contiguous range of VAs with the same permissions/mapping

  8. What is the relationship between VMAs, PTEs, and physical frames? Physcial Frames - holds actual data/payload PTEs - maps i virtual page to 1 physical frame VMAs - describes a contiguous run of pages

Section 3 – Page Tables and Faults​

  1. What’s the difference between single-level, multi-level, and inverted page tables?

    • Just the structure... may affect lookup times

  2. What is a minor fault? see walkthrough below

  3. What is a major fault? see walkthrough below

  4. What is a page replacement policy? Give two examples. basically the algorithm -- FIFO, LRU. FIFO may suffer from Beladys anomaly (more frames !== less faults)

  5. What is “thrashing” and what causes it?

    • Lots of page faults due to working set being larger than RAM... so we are going to swap on many MMU requests

  6. What happens during a page fault from the OS’s perspective (high level)? CPU - i need VA 0x1, so i check TLB PTE for Ox1 not in TLB -> page fault 0x1 in RAM (minor fault) - walk page table in RAM to find PTE -> pull item 0x1 not in RAM (major fault) - walk page table in swap to find PTE -> pull into RAM -> pull item

  7. Why can having too small a page size be inefficient? Why can too large a page size be inefficient? is this of the actual data? or are we talk page table size? for actual pages: if too small, lots of loads (mov) if too big, need to scan entire page before getting to the piece you want to actually use

Section 4 – Copy-on-Write and fork()​

  1. During fork(), why doesn’t the OS copy all pages immediately? Child proc may never touch many of these pages, so it would be wasteful to copy

  2. How does the OS enforce copy-on-write behavior? triggers page fault on purpose

  3. What triggers an actual page copy after fork? page fault - write attempt on a shared page triggers a fault, OS allocates a new frame, copies data, updates PTE

  4. In COW, what happens to the PTEs for shared pages before a write? PTEs change to point to new frame (you dont get new VMAs though)

  5. Why is COW useful for performance? avoids copying untouched memory, both processes share until a write occurs

Section 5 – Scenarios​

  1. VA in TLB, physical frame in RAM → What happens? Is this a fault? no fault - normal serve - 15-love
  2. VA not in TLB, present in RAM → What happens? Minor or major fault? minor fault, walk page table in RAM, pull page from RAM
  3. VA not in TLB, present in swap → What happens? Minor or major fault? major fault, walk page table in RAM, pull page from swap
  4. VA in TLB but page not in RAM or swap → What’s wrong here? stale/inconsistent mapping - triggers SIGBUS or SIGSEGV - usually a kernel or hardware issue
  5. Heap allocation exceeds available RAM and swap → What will happen? allocation fails, malloc() returns NULL (in C), or OOM killer terminates processes in Linux
  6. Function allocates huge local array on stack → Possible outcome? may blow past stack limit SIGSEGV

Section 6 – Advanced / Edge Cases​

  1. What is the purpose of the Accessed and Dirty bits in a PTE? Accessed: set when page is read Dirty: set when page is written Used by the OS for eviction and write back decisions
  2. How does the OS decide which page to evict?
    • LRU, or approximation for efficiency
  3. What is the benefit of using huge pages?
    • reduce TLB misses (cover more memory per entry) and reduce page table size
      • waste memory if alloc granularity is too coarse
  4. How does an ASID or PCID help with TLB performance during context switches?
    • tags TLB entries by proc, so TLB doesnt have to be flushed on context switch
  5. In Linux, what command can show you the VMAs for a process?
    • cat /proc/<pid>/maps
  6. In Linux, what file can show you the raw page table mappings for a process? /proc/<pid>/pagemap

I can make this into a Markdown “quiz sheet” with spacing for answers, so you can literally print or run it in a note app and fill it in without looking. That way you could reuse the same template for each spaced repetition session.

Do you want me to go ahead and convert this list into that format? That would make it ready-to-use tomorrow without editing.

Comments

No comments yet. Be the first!